L'angolo di Antonio ...

Uno dei componenti più "delicati" del Commodore 64 è sempre stato il PLA (Programmable Logic Array) che scaldava tanto e si "bruciava" facilmente.

Purtroppo era un componente un po' particolare (per i tempi) e non era facilmente sostituibile, se non trovando un ricambio originale.

Le sue funzioni erano quelle di generare alcuni segnali utili all'indirizzamento corretto delle aree di memoria a partire da altri segnali in ingresso.

I dettagli li potere trovare a partire da

http://www.c64-wiki.com/index.php/PLA_(C64_chip)

Oggi questo componente è un po' difficile da trovarsi e quando si guasta si devono usare altre strade per rimediare.

Personalmente ho utilizzato con successo un CPLD

http://en.wikipedia.org/wiki/Complex_programmable_logic_device

abbastanza comune e di basso costo:

un integrato 7032 della Altera che ho programmato utilizzando le equazioni originali del PLA (prima versione del C64).

Ho utilizzato il programma Quartus distribuito gratuitamente dalla Altera.

Il codice VHDL è il seguente

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY PLA_MODULE IS
	PORT
	(
	P_A12      : IN  STD_LOGIC;	    -- pin 27 
	P_A13      : IN  STD_LOGIC;         -- pin  2
	P_A14      : IN  STD_LOGIC;         -- pin  3
	P_A15      : IN  STD_LOGIC;         -- pin  4
	P_VA12     : IN  STD_LOGIC;         -- pin 20
	P_VA13     : IN  STD_LOGIC;         -- pin 21
	P_VA14_N   : IN  STD_LOGIC;         -- pin  5
	P_LORAM_N  : IN  STD_LOGIC;         -- pin  8
	P_HIRAM_N  : IN  STD_LOGIC;         -- pin  7
	P_CHAREN_N : IN  STD_LOGIC;         -- pin  6
	P_CAS_N    : IN  STD_LOGIC;         -- pin  9
	P_GAME_N   : IN  STD_LOGIC;         -- pin 22
	P_EXROM_N  : IN  STD_LOGIC;         -- pin 23
	P_RW_N     : IN  STD_LOGIC;         -- pin 24
	P_AEC_N    : IN  STD_LOGIC;         -- pin 25
	P_BA       : IN  STD_LOGIC;         -- pin 26

	P_CHAROM_N : OUT STD_LOGIC;         -- pin 15
	P_KERNAL_N : OUT STD_LOGIC;         -- pin 16
	P_BASIC_N  : OUT STD_LOGIC;         -- pin 17
	P_ROMH_N   : OUT STD_LOGIC;         -- pin 10
	P_ROML_N   : OUT STD_LOGIC;         -- pin 11
	P_GRW_N    : OUT STD_LOGIC;         -- pin 13
	P_CASRAM_N : OUT STD_LOGIC;         -- pin 18
	P_IO_N     : OUT STD_LOGIC          -- pin 12
	);
END PLA_MODULE;

ARCHITECTURE rtl OF PLA_MODULE IS

  SIGNAL ROML_N_S, 
         ROMH_N_S,
         IO_N_S,
         GRW_N_S,
         CHAROM_N_S,
         KERNAL_N_S,
         BASIC_N_S,
         CASRAM_N_S    : STD_LOGIC;

BEGIN

  ROML_N_S <= NOT (
    (P_LORAM_N AND P_HIRAM_N AND P_A15 AND NOT P_A14 AND NOT P_A13 AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N) OR
    (P_A15 AND NOT P_A14 AND NOT P_A13 AND NOT P_AEC_N AND P_EXROM_N AND NOT P_GAME_N)
  );

  ROMH_N_S <= NOT (
    (P_HIRAM_N AND P_A15 AND NOT P_A14 AND P_A13 AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_A15 AND P_A14 AND P_A13 AND NOT P_AEC_N AND P_EXROM_N AND NOT P_GAME_N) OR
    (P_AEC_N AND P_EXROM_N AND NOT P_GAME_N AND P_VA13 AND P_VA12)
  );

  IO_N_S <= NOT (
    (P_HIRAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_HIRAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND P_GAME_N) OR
    (P_LORAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_LORAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND P_GAME_N) OR
    (P_HIRAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_HIRAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_LORAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_LORAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND P_EXROM_N AND NOT P_GAME_N) OR
    (P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND P_EXROM_N AND NOT P_GAME_N)
  );

  GRW_N_S <= NOT (
    (NOT P_CAS_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N)
  );

  CHAROM_N_S <= NOT (
    (P_HIRAM_N AND NOT P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_LORAM_N AND NOT P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_HIRAM_N AND NOT P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_VA14_N AND P_AEC_N AND P_GAME_N AND NOT P_VA13 AND P_VA12) OR
    (P_VA14_N AND P_AEC_N AND NOT P_EXROM_N AND NOT P_GAME_N AND NOT P_VA13 AND P_VA12)
  );

  KERNAL_N_S <= NOT (
    (P_HIRAM_N AND P_A15 AND P_A14 AND P_A13 AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_HIRAM_N AND P_A15 AND P_A14 AND P_A13 AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N)
  );

  BASIC_N_S <= NOT (
    (P_LORAM_N AND P_HIRAM_N AND P_A15 AND NOT P_A14 AND P_A13 AND NOT P_AEC_N AND P_RW_N AND P_GAME_N)
  );

  CASRAM_N_S <= (
    (P_LORAM_N AND P_HIRAM_N AND P_A15 AND NOT P_A14 AND P_A13 AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_HIRAM_N AND P_A15 AND P_A14 AND P_A13 AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_HIRAM_N AND P_A15 AND P_A14 AND P_A13 AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_HIRAM_N AND NOT P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_LORAM_N AND NOT P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_HIRAM_N AND NOT P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_VA14_N AND P_AEC_N AND P_GAME_N AND NOT P_VA13 AND P_VA12) OR
    (P_VA14_N AND P_AEC_N AND NOT P_EXROM_N AND NOT P_GAME_N AND NOT P_VA13 AND P_VA12) OR
    (P_HIRAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_HIRAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND P_GAME_N) OR
    (P_LORAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND P_GAME_N) OR
    (P_LORAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND P_GAME_N) OR
    (P_HIRAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_HIRAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_LORAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_LORAM_N AND P_CHAREN_N AND P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND P_BA AND NOT P_AEC_N AND P_RW_N AND P_EXROM_N AND NOT P_GAME_N) OR
    (P_A15 AND P_A14 AND NOT P_A13 AND P_A12 AND NOT P_AEC_N AND NOT P_RW_N AND P_EXROM_N AND NOT P_GAME_N) OR
    (P_LORAM_N AND P_HIRAM_N AND P_A15 AND NOT P_A14 AND NOT P_A13 AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N) OR
    (P_A15 AND NOT P_A14 AND NOT P_A13 AND NOT P_AEC_N AND P_EXROM_N AND NOT P_GAME_N) OR
    (P_HIRAM_N AND P_A15 AND NOT P_A14 AND P_A13 AND NOT P_AEC_N AND P_RW_N AND NOT P_EXROM_N AND NOT P_GAME_N) OR
    (P_A15 AND P_A14 AND P_A13 AND NOT P_AEC_N AND P_EXROM_N AND NOT P_GAME_N) OR
    (P_AEC_N AND P_EXROM_N AND NOT P_GAME_N AND P_VA13 AND P_VA12) OR
    (NOT P_A15 AND NOT P_A14 AND P_A12 AND P_EXROM_N AND NOT P_GAME_N) OR
    (NOT P_A15 AND NOT P_A14 AND P_A13 AND P_EXROM_N AND NOT P_GAME_N) OR
    (NOT P_A15 AND P_A14 AND P_EXROM_N AND NOT P_GAME_N) OR
    (P_A15 AND NOT P_A14 AND P_A13 AND P_EXROM_N AND NOT P_GAME_N) OR
    (P_A15 AND P_A14 AND NOT P_A13 AND NOT P_A12 AND P_EXROM_N AND NOT P_GAME_N) OR
    (P_CAS_N)
  );

  P_ROML_N    <= ROML_N_S;   
  P_ROMH_N    <= ROMH_N_S;   
  P_IO_N      <= IO_N_S;     
  P_GRW_N     <= GRW_N_S;    
  P_CHAROM_N  <= CHAROM_N_S; 
  P_KERNAL_N  <= KERNAL_N_S; 
  P_BASIC_N   <= BASIC_N_S;  
  P_CASRAM_N  <= CASRAM_N_S; 

END rtl;

Non ho sviluppato un circuito stampato apposito ma ho semplicemente utilizzato una "millefori" con uno zoccolo da inserire al posto del PLA e dei collegamenti con dei fili al 7032.

Nel primo allegato



trovate lo schema elettrico equivalente per il CPLD (con i numeri dei pin impostati nel progetto compilato con il Quartus).

Nell'altro allegato



potete vedere i collegamenti su una piccola scheda millefori.

Ecco l'oggetto da sopra



e da sotto



Buon divertimento!